The present invention relates to the field of integrated circuit technology, and more specifically to techniques for integrated circuit packaging in a flip chip configuration.
Integrated circuits (ICs) or “chips” can be bonded to a package substrate using a flip chip technique. An IC device configured for flip chip bonding includes solder bumps formed on interconnection pads on the active side of the device. The IC device is then “flipped” and bonded to a package substrate with a matching set of interconnection pads. The solder bumps form solder joints between the chip and the package substrate, which provide both mechanical and electrical interconnects.
Flip chip bonding techniques have been applied to programmable logic devices (PLDs), a type of programmable logic integrated circuit. PLDs typically have numerous logic blocks that can be configured to implement various combinatorial and sequential functions. These logic blocks have access to a programmable interconnect structure. The programmable interconnect structure can be programmed to interconnect the logic blocks in almost any desired configuration. Many of today's PLDs have on-chip nonprogrammable application specific integrated circuit (ASIC) blocks. The ASIC blocks are also referred to as hard intellectual property (HIP) blocks.
The internal architectures of PLD's vary but frequently a number of PLD's will share the same internal architecture and operating characteristics and be marketed as a family. The distinction between members in the family is the total number of functional logic elements included in each member. It is not uncommon for a product to include a PLD having a smaller number of functional logic elements than another member of its device family. The smaller PLD may have been chosen to reduce costs. However, if performance demands increase, the smaller PLD is sometimes replaced by a larger device of the same family. Up until now, however, package pins may not serve the same device input/output (I/O) signals across a family, thus a redesign would be required. Despite their common internal architecture that allowed migration between different packages in the family, their external packaging did not readily support migration.
Accordingly, there is a need in the art for integrated circuit packaging that ensures a migration path between related integrated circuits.